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<title>Programmable logic array</title>

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<span id="openzim-page-title" class="mw-page-title-main"><span class="mw-page-title-main">Programmable logic array</span></span>

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</style><div role="note" class="hatnote navigation-not-searchable">Not to be confused with <a href="Programmable_Array_Logic" title="Programmable Array Logic">Programmable Array Logic</a>.</div>

<p>A <b> programmable logic array</b> (<b>PLA</b>) is a kind of <a href="Programmable_logic_device" title="Programmable logic device">programmable logic device</a> used to implement <a href="Combinational_logic" title="Combinational logic">combinational logic</a> <a href="Electrical_network" title="Electrical network">circuits</a>. The PLA has a set of programmable <a href="AND_gate" title="AND gate">AND gate</a> planes, which link to a set of programmable <a href="OR_gate" title="OR gate">OR gate</a> planes, which can then be conditionally complemented to produce an output. It has 2<sup>N</sup> AND gates for N input variables, and for M outputs from the PLA, there should be M OR gates, each with programmable inputs from all of the AND gates. This layout allows for many logic functions to be synthesized in the sum of products <a href="Canonical_normal_form" title="Canonical normal form">canonical forms</a>.

</p><p>PLAs differ from <a href="Programmable_Array_Logic" title="Programmable Array Logic">programmable array logic</a> devices (<a href="Programmable_Array_Logic" title="Programmable Array Logic">PALs</a> and <a href="Generic_Array_Logic" title="Generic Array Logic">GALs</a>) in that both the AND and OR gate planes are programmable. PAL has programmable AND gates but fixed OR gates

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<div class="mw-heading mw-heading2"><h2 id="History">History</h2></div>

<p>In 1970, <a href="Texas_Instruments" title="Texas Instruments">Texas Instruments</a> developed a <a href="Photomask" title="Photomask">mask</a>-programmable IC based on the <a href="IBM" title="IBM">IBM</a> read-only <a href="Content-addressable_memory" title="Content-addressable memory">associative memory</a> or ROAM. This device, the TMS2000, was programmed by altering the metal layer during the production of the IC. The TMS2000 had up to 17 inputs and 18 outputs with 8 <a href="JK_flip-flops" class="mw-redirect" title="JK flip-flops">JK flip-flops</a> for memory. TI coined the term <i>Programmable Logic Array</i> for this device.<sup id="cite_ref-TI_PLA_1970_1-0" class="reference"><a href="#cite_note-TI_PLA_1970-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup>

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<div class="mw-heading mw-heading2"><h2 id="Implementation_procedure">Implementation procedure</h2></div>

<ol><li>Preparation in SOP (<a href="Sum_of_products" class="mw-redirect" title="Sum of products">sum of products</a>) form.</li>

<li>Obtain the minimum SOP form to reduce the number of product terms to a minimum.</li>

<li>Decide the input connection of the AND matrix for generating the required product term.</li>

<li>Then decide the input connections of the OR matrix to generate the sum terms.</li>

<li>Decide the connections of the inversion matrix.</li>

<li>Program the PLA.</li></ol>

<p>PLA block diagram:

</p>

<th>1<sup>st</sup> block</th>

<th>2<sup>nd</sup> block</th>

<th>3<sup>rd</sup> block</th>

<th>4<sup>TH</sup> block</th>

<th>5<sup>th</sup> block

</th></tr>

<tr>

<td>Input buffer</td>

<td>AND matrix</td>

<td>OR matrix</td>

<td>Invert/non-invert matrix</td>

<td>Flip-flop output buffer

</td></tr></tbody></table>

<div class="mw-heading mw-heading2"><h2 id="Advantages_over_read-only_memory">Advantages over read-only memory</h2></div>

<p>The desired outputs for each combination of inputs <i>could</i> be programmed into a <a href="Read-only_memory" title="Read-only memory">read-only memory</a>, with the inputs being driven by the address bus and the outputs being read out as data. However, that would require a separate memory location for <i>every</i> possible combination of inputs, including combinations that are never supposed to occur, and also duplicating data for "don't care" conditions (for example, logic like "if input A is 1, then, as far as output X is concerned, we don't care what input B is": in a ROM this would have to be written out twice, once for each possible value of B, and as more "don't care" inputs are added, the duplication grows exponentially); therefore, a programmable logic array can often implement a piece of logic using fewer transistors than the equivalent in read-only memory. This is particularly valuable when it is part of a processing chip where transistors are scarce (for example, the original <a href="MOS_Technology_6502" title="MOS Technology 6502">6502</a> chip contained a PLA to direct various operations of the processor<sup id="cite_ref-2" class="reference"><a href="#cite_note-2"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup>).

</p>

<div class="mw-heading mw-heading2"><h2 id="Applications">Applications</h2></div>

<p>One application of a PLA is to implement the control over a <a href="Datapath" title="Datapath">datapath</a>. It defines various states in an instruction set, and produces the next state (by conditional branching). [e.g. if the machine is in state 2, and will go to state 4 if the instruction contains an immediate field; then the PLA should define the actions of the control in state 2, will set the next state to be 4 if the instruction contains an immediate field, and will define the actions of the control in state 4]. Programmable logic arrays should correspond to a <a href="State_diagram" title="State diagram">state diagram</a> for the system.

</p><p>The earliest <a href="Commodore_64" title="Commodore 64">Commodore 64</a> home computers released in 1982 (into early 1983) initially used a programmed Signetics 82S100 PLA, but as the demand increased, MOS Technology / Commodore Semiconductor Group began producing a mask-programmed PLA, which bore part number 906114-01.<sup id="cite_ref-3" class="reference"><a href="#cite_note-3"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup>

</p>

<ul><li><a href="Field-programmable_gate_array" title="Field-programmable gate array">Field-programmable gate array</a></li>

<li><a href="Gate_array" title="Gate array">Gate array</a></li>

<li><a href="Programmable_Array_Logic" title="Programmable Array Logic">Programmable Array Logic</a></li></ul>

<div class="mw-heading mw-heading2"><h2 id="References">References</h2></div>

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</style><cite id="CITEREFAndres1970" class="citation book cs1">Andres, Kent (October 1970). <i>A Texas Instruments Application Report: MOS programmable logic arrays</i>. Texas Instruments. Bulletin CA-158.</cite></span>

</li>

<li id="cite_note-2"><span class="mw-cite-backlink"><b><a href="#cite_ref-2">^</a></b></span> <span class="reference-text"><a rel="nofollow" class="external text" href="http://www.pagetable.com/?p=39">How MOS 6502 Illegal Opcodes really work</a></span>

</li>

<li id="cite_note-3"><span class="mw-cite-backlink"><b><a href="#cite_ref-3">^</a></b></span> <span class="reference-text"><a rel="nofollow" class="external text" href="http://www.arcadecomponents.com/catalog/item/3054735/2582640.htm">arcadecomponents.com - Commodore 906114-01 64 PLA IC</a></span>

</li>

</ol></div></div>

<div class="mw-heading mw-heading2"><h2 id="External_links">External links</h2></div>

<ul><li><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://web.archive.org/web/20171214191144/www.cs.umd.edu/class/spring2003/cmsc311/Notes/Comb/pla.html">"Programmable Logic Array (PLA)"</a>. <i>cmsc311</i>. <a href="University_of_Maryland" class="mw-redirect" title="University of Maryland">University of Maryland</a>. 2003. Archived from <a rel="nofollow" class="external text" href="http://www.cs.umd.edu/class/spring2003/cmsc311/Notes/Comb/pla.html">the original</a> on 2017-12-14.</cite></li>

<li><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://web.archive.org/web/20130115113124/http://tams-www.informatik.uni-hamburg.de/applets/hades/webdemos/42-programmable/10-pla/pla.html">"PLA (programmable logic array)"</a>. <i>Java Applet</i>. <a href="University_of_Hamburg" title="University of Hamburg">University of Hamburg</a>. Archived from <a rel="nofollow" class="external text" href="http://tams-www.informatik.uni-hamburg.de/applets/hades/webdemos/42-programmable/10-pla/pla.html">the original</a> on 2013-01-15<span class="reference-accessdate">. Retrieved <span class="nowrap">2010-04-07</span></span>.</cite></li></ul>

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</style><div id="Programmable_logic116" style="font-size:114%;margin:0 4em"><a href="Programmable_logic_device" title="Programmable logic device">Programmable logic</a></div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%">Concepts</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Logic_block" title="Logic block">Logic block</a></li></ul></li>

<li><a href="Reconfigurable_computing" title="Reconfigurable computing">Reconfigurable computing</a>

<ul><li><a href="Xputer" title="Xputer">Xputer</a></li></ul></li>

<li><a href="Soft_microprocessor" title="Soft microprocessor">Soft microprocessor</a></li>

<li><a href="Circuit_underutilization" title="Circuit underutilization">Circuit underutilization</a></li>

<li><a href="High-level_synthesis" title="High-level synthesis">High-level synthesis</a></li>

<li><a href="Hardware_acceleration" title="Hardware acceleration">Hardware acceleration</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Hardware_description_language" title="Hardware description language">Languages</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Verilog" title="Verilog">Verilog</a>

<li><a href="VHDL-VITAL" class="mw-redirect" title="VHDL-VITAL">VITAL</a></li></ul></li>

<li><a href="SystemVerilog" title="SystemVerilog">SystemVerilog</a>

<li><a href="SystemC" title="SystemC">SystemC</a></li>

<li><a href="Handel-C" title="Handel-C">Handel-C</a></li>

<li><a href="PALASM" title="PALASM">PALASM</a></li>

<li><a href="MyHDL" title="MyHDL">MyHDL</a></li>

<li><a href="Chisel_(programming_language)" title="Chisel (programming language)">Chisel</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Companies</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Accellera" title="Accellera">Accellera</a></li>

<li><a href="Achronix" title="Achronix">Achronix</a></li>

<li><a href="Aldec" title="Aldec">Aldec</a></li>

<li><a href="Cadence_Design_Systems" title="Cadence Design Systems">Cadence</a></li>

<li><a href="Infineon_Technologies" title="Infineon Technologies">Infineon</a></li>

<li><a href="Intel" title="Intel">Intel</a></li>

<li><a href="Lattice_Semiconductor" title="Lattice Semiconductor">Lattice</a></li>

<li><a href="Microchip_Technology" title="Microchip Technology">Microchip Technology</a></li>

<li><a href="Siemens" title="Siemens">Siemens</a></li>

<li><a href="Synopsys" title="Synopsys">Synopsys</a></li>

<li><a href="Texas_Instruments" title="Texas Instruments">Texas Instruments</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Products</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%">Hardware</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">

<li><a href="Stratix" title="Stratix">Stratix</a></li>

<li><a href="Virtex_(FPGA)" title="Virtex (FPGA)">Virtex</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Software</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Intel_Quartus_Prime" class="mw-redirect" title="Intel Quartus Prime">Intel Quartus Prime</a></li>

<li><a href="Xilinx_ISE" title="Xilinx ISE">Xilinx ISE</a></li>

<li><a href="Vivado" title="Vivado">Vivado</a></li>

<li><a href="ModelSim" title="ModelSim">ModelSim</a></li>

<li><a href="List_of_HDL_simulators" title="List of HDL simulators">Simulators</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Intellectual_property" title="Intellectual property">Intellectual<br>property</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Proprietary_hardware" title="Proprietary hardware">Proprietary</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">

<li><a href="ARM_Cortex-M" title="ARM Cortex-M">ARM Cortex-M</a></li>

<li><a href="LatticeMico8" title="LatticeMico8">LatticeMico8</a></li>

<li><a href="MicroBlaze" title="MicroBlaze">MicroBlaze</a></li>

<li><a href="PicoBlaze" title="PicoBlaze">PicoBlaze</a></li>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Open-source_hardware" title="Open-source hardware">Open-source</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">

<li><a href="LatticeMico32" title="LatticeMico32">LatticeMico32</a></li>

<li><a href="OpenCores" title="OpenCores">OpenCores</a></li>

<li><a href="OpenRISC" title="OpenRISC">OpenRISC</a>

<li><a href="Power_ISA" title="Power ISA">Power ISA</a>

<ul><li><a href="Libre-SOC" title="Libre-SOC">Libre-SOC</a></li>

<li><a href="OpenPOWER_Microwatt" title="OpenPOWER Microwatt">Microwatt</a></li></ul></li>

</div></td></tr></tbody></table><div></div></td></tr></tbody></table><div></div></td></tr></tbody></table></div>

<div class="navbox-styles"></div><div role="navigation" class="navbox" aria-labelledby="Digital_electronics118" style="padding:3px"><table class="nowraplinks mw-collapsible autocollapse navbox-inner" style="border-spacing:0;background:transparent;color:inherit"><tbody><tr><th scope="col" class="navbox-title" colspan="2"><div id="Digital_electronics118" style="font-size:114%;margin:0 4em"><a href="Digital_electronics" title="Digital electronics">Digital electronics</a></div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%;text-align:center;"><a href="Electronic_component" title="Electronic component">Components</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Transistor" title="Transistor">Transistor</a></li>

<li><a href="Resistor" title="Resistor">Resistor</a></li>

<li><a href="Inductor" title="Inductor">Inductor</a></li>

<li><a href="Capacitor" title="Capacitor">Capacitor</a></li>

<li><a href="Printed_electronics" title="Printed electronics">Printed electronics</a></li>

<li><a href="Printed_circuit_board" title="Printed circuit board">Printed circuit board</a></li>

<li><a href="Electronic_circuit" title="Electronic circuit">Electronic circuit</a></li>

<li><a href="Memory_cell_(computing)" title="Memory cell (computing)">Memory cell</a></li>

<li><a href="Combinational_logic" title="Combinational logic">Combinational logic</a></li>

<li><a href="Sequential_logic" title="Sequential logic">Sequential logic</a></li>

<li><a href="Logic_gate" title="Logic gate">Logic gate</a></li>

<li><a href="Boolean_circuit" title="Boolean circuit">Boolean circuit</a></li>

<li><a href="Integrated_circuit" title="Integrated circuit">Integrated circuit</a> (IC)</li>

<li><a href="Hybrid_integrated_circuit" title="Hybrid integrated circuit">Hybrid integrated circuit</a> (HIC)</li>

<li><a href="Mixed-signal_integrated_circuit" title="Mixed-signal integrated circuit">Mixed-signal integrated circuit</a></li>

<li><a href="Three-dimensional_integrated_circuit" title="Three-dimensional integrated circuit">Three-dimensional integrated circuit</a> (3D IC)</li>

<li><a href="Emitter-coupled_logic" title="Emitter-coupled logic">Emitter-coupled logic</a> (ECL)</li>

<li><a href="Erasable_programmable_logic_device" class="mw-redirect" title="Erasable programmable logic device">Erasable programmable logic device</a> (EPLD)</li>

<li><a href="Macrocell_array" title="Macrocell array">Macrocell array</a></li>

<li><a href="Programmable_logic_device" title="Programmable logic device">Programmable logic device</a> (PLD)</li>

<li><a href="Programmable_Array_Logic" title="Programmable Array Logic">Programmable Array Logic</a> (PAL)</li>

<li><a href="Generic_Array_Logic" title="Generic Array Logic">Generic Array Logic</a> (GAL)</li>

<li><a href="Complex_programmable_logic_device" title="Complex programmable logic device">Complex programmable logic device</a> (CPLD)</li>

<li><a href="Field-programmable_gate_array" title="Field-programmable gate array">Field-programmable gate array</a> (FPGA)</li>

<li><a href="Field-programmable_object_array" title="Field-programmable object array">Field-programmable object array</a> (FPOA)</li>

<li><a href="Application-specific_integrated_circuit" title="Application-specific integrated circuit">Application-specific integrated circuit</a> (ASIC)</li>

<li><a href="Tensor_Processing_Unit" title="Tensor Processing Unit">Tensor Processing Unit</a> (TPU)</li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%;text-align:center;">Theory</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Digital_signal" title="Digital signal">Digital signal</a></li>

<li><a href="Boolean_algebra" title="Boolean algebra">Boolean algebra</a></li>

<li><a href="Logic_synthesis" title="Logic synthesis">Logic synthesis</a></li>

<li><a href="Logic_in_computer_science" title="Logic in computer science">Logic in computer science</a></li>

<li><a href="Computer_architecture" title="Computer architecture">Computer architecture</a></li>

<li><a href="Digital_signal_(signal_processing)" title="Digital signal (signal processing)">Digital signal</a>

<ul><li><a href="Digital_signal_processing" title="Digital signal processing">Digital signal processing</a></li></ul></li>

<li><a href="Circuit_minimization_for_Boolean_functions" class="mw-redirect" title="Circuit minimization for Boolean functions">Circuit minimization</a></li>

<li><a href="Switching_circuit_theory" title="Switching circuit theory">Switching circuit theory</a></li>

<li><a href="Gate_equivalent" title="Gate equivalent">Gate equivalent</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%;text-align:center;"><a href="Electronics_design" class="mw-redirect" title="Electronics design">Design</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Logic_synthesis" title="Logic synthesis">Logic synthesis</a></li>

<li><a href="Place_and_route" title="Place and route">Place and route</a>

<ul><li><a href="Placement_(electronic_design_automation)" title="Placement (electronic design automation)">Placement</a></li>

<li><a href="Routing_(electronic_design_automation)" title="Routing (electronic design automation)">Routing</a></li></ul></li>

<li><a href="Transaction-level_modeling" title="Transaction-level modeling">Transaction-level modeling</a></li>

<li><a href="Register-transfer_level" title="Register-transfer level">Register-transfer level</a>

<ul><li><a href="Hardware_description_language" title="Hardware description language">Hardware description language</a></li>

<li><a href="High-level_synthesis" title="High-level synthesis">High-level synthesis</a></li></ul></li>

<li><a href="Formal_equivalence_checking" title="Formal equivalence checking">Formal equivalence checking</a></li>

<li><a href="Synchronous_circuit" title="Synchronous circuit">Synchronous logic</a></li>

<li><a href="Asynchronous_circuit" title="Asynchronous circuit">Asynchronous logic</a></li>

<li><a href="Finite-state_machine" title="Finite-state machine">Finite-state machine</a>

<ul><li><a href="Hierarchical_state_machine" class="mw-redirect" title="Hierarchical state machine">Hierarchical state machine</a></li></ul></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%;text-align:center;">Applications</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Computer_hardware" title="Computer hardware">Computer hardware</a>

<ul><li><a href="Hardware_acceleration" title="Hardware acceleration">Hardware acceleration</a></li></ul></li>

<li><a href="Digital_audio" title="Digital audio">Digital audio</a>

<ul><li><a href="Digital_radio" title="Digital radio">radio</a></li></ul></li>

<li><a href="Digital_photography" title="Digital photography">Digital photography</a></li>

<li><a href="Telephony#Digital_telephony" title="Telephony">Digital telephone</a></li>

<li><a href="Digital_video" title="Digital video">Digital video</a>

<ul><li><a href="Digital_cinematography" title="Digital cinematography">cinematography</a></li>

<li><a href="Digital_television" title="Digital television">television</a></li></ul></li>

<li><a href="Electronic_literature" title="Electronic literature">Electronic literature</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%;text-align:center;">Design issues</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Metastability_(electronics)" title="Metastability (electronics)">Metastability</a></li>

<li><a href="Runt_pulse" title="Runt pulse">Runt pulse</a></li></ul>

</div></td></tr></tbody></table></div>

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